Atmel 公司的ATmega88是帶有8KB在系統(tǒng)編程Flash的8位微控制器，它是基于增強RISC架構(gòu)，有豐富的指令集和32個通用的工作寄存器，吞吐量達到1 MIPS /MHz, 廣泛應用于汽車電子和工業(yè)控制等領(lǐng)域。本文介紹了ATmega88的主要性能，方框圖以及用于汽車馬達控制的開發(fā)板ATAVRAUTO200的主要性能與詳細電路圖。

ATmega88 8-bit Microcontroller with 8K Bytes In-System Programmable Flash

The ATmega48/88/168 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By execut ing powerful inst ruct ions in a single clock cycle, the ATmega48/88/168 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.
The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.
The ATmega48/88/168 provides the following features: 4K/8K/16K bytes of In-System Programmable Flash with Read-While-Write capabilities, 256/512/512 bytes EEPROM, 512/1K/1K bytes SRAM, 23 general purpose I/O lines, 32 general purpose working registers, three flexible Timer/Counters with compare modes, internal and external interrupts, a serial programmable USART, a byte-oriented 2-wire Serial Interface, an SPI serial port, a 6-channel 10-bit ADC (8 channels in TQFP and QFN packages), a programmable Watchdog Timer with internal Oscillator, and five software selectable power saving modes. The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, USART, 2-wire Serial Interface, SPI port, and interrupt system to continue functioning. The Power-down mode saves the register contents but freezes the
Oscillator, disabling all other chip functions until the next interrupt or hardware reset. In Powersave mode, the asynchronous timer continues to run, allowing the user to maintain a timer base while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except asynchronous timer and ADC, to minimize switching noise during ADC conversions.
In Standby mode, the crystal/resonator Oscillator is running while the rest of the device
is sleeping. This allows very fast start-up combined with low power consumption.

ATmega88主要特性：
High Performance, Low Power AVR® 8-Bit Microcontroller
Advanced RISC Architecture
131 Powerful Instructions – Most Single Clock Cycle Execution
32 x 8 General Purpose Working Registers
Fully Static Operation
Up to 16 MIPS Throughput at 16 MHz
On-chip 2-cycle Multiplier
Non-volatile Program and Data Memories
4/8/16K Bytes of In-System Self-Programmable Flash (ATmega48/88/168)
Endurance: 75,000 Write/Erase Cycles
Optional Boot Code Section with Independent Lock Bits
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
256/512/512 Bytes EEPROM (ATmega48/88/168)
Endurance: 100,000 Write/Erase Cycles
512/1K/1K Byte Internal SRAM (ATmega48/88/168)
Programming Lock for Software Security
Peripheral Features
Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture
Mode
Real Time Counter with Separate Oscillator
Six PWM Channels
8-channel 10-bit ADC
Programmable Serial USART
Master/Slave SPI Serial Interface
Byte-oriented 2-wire Serial Interface
Programmable Watchdog Timer with Separate On-chip Oscillator
On-chip Analog Comparator
Interrupt and Wake-up on Pin Change
Special Microcontroller Features
Power-on Reset and Programmable Brown-out Detection
Internal Calibrated Oscillator
External and Internal Interrupt Sources
Five Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, and
Standby
I/O and Packages
23 Programmable I/O Lines
Green/ROHS 32-lead TQFP and 32-pad QFN
Operating Voltage:
2.7 - 5.5V for ATmega48/88/168
Temperature Range:
40C to 125C
Speed Grade:
ATmega48/88/168: 0 - 8 MHz @ 2.7 - 5.5V, 0 - 16 MHz @ 4.5 - 5.5V
Low Power Consumption
Active Mode:
4 MHz, 3.0V: 1.8mA

圖1. ATmega88方框圖

ATmega88開發(fā)板ATAVRAUTO200

This document describes the ATAVRAUTO200 dedicated to the ATmega88 AVR micro
controllers. This board is designed to allow an easy evaluation of the product using
demonstration firmware.
This board includes all elements necessary for designers to quickly develop code related to LIN communication node implementing the ATmega88 and for prototyping and testing of new designs.

圖2. ATAVRAUTO200開發(fā)板外形圖

The ATAVRAUTO200 provides the following features:
ATmega88 QFN32
AVR Studio® software interface,
Power supply
Regulated 5V
From LIN connector (LIN network power supply)
JTAG connector:
for on-chip In Situ Programming (ISP)
for on-chip debugging using JTAG ICE
DC Motor connector
DC Motor power supply output
Hall effect sensor(s) power supply and input(s)
Serial interface:
1 LIN interface 1.3 and 2.0 compliant (firmware library available on the ATMEL
website for LIN 1.3).
On-board resources:
1 LIN transceiver with internal regulator
Relay for DC motor control
Shunt Resistor for motor current measurement
Speed/Position measurement Inputs
Power supply measurement
System clock:
Internal RC oscillator
Dimension: 45 mm x 45 mm

圖3.ATAVRAUTO200馬達控制電路圖

下表為ATAVRAUTO200開發(fā)板元件清單