PIC16F877A的timer
----------------------------------------------------------timer 0----------------------------------------------------------
TMR0為8位寬,有一個(gè)可選的預(yù)分頻器,用于通用目的,可用于定時(shí)和計(jì)數(shù)。
TMR1為16位寬,附帶一個(gè)可編程的預(yù)分頻器和一個(gè)可選的低頻時(shí)基振蕩器,適合與CPP模塊配合使用來實(shí)現(xiàn)輸入捕扣或輸出比較功能,也可于定時(shí)和計(jì)數(shù)。
TMR2為8位寬,附帶一個(gè)配合使用來實(shí)現(xiàn)PWM脈沖寬度調(diào)制信號(hào)的產(chǎn)生,只能用于定時(shí)。
TMR0用作定時(shí)器時(shí),定時(shí)器時(shí)鐘=系統(tǒng)時(shí)鐘/4;
寫TMR0時(shí),會(huì)產(chǎn)生2個(gè)周期的的延時(shí),如果不使用前置分頻器,可通過設(shè)置
初值進(jìn)行補(bǔ)償。
例如 需要定時(shí)200個(gè)時(shí)鐘周期時(shí),TMR0 = 256 -200 + 2= 58
OPTION_REG:
bit5 T0CS:TMR0 Clock Source Select bit
1 = Transition on T0CKI pin
0 = Internal instruction cycle clock(CLKO)
bit 4 T0SE:TMR0 Source Edge Select bit
1 = Increment on high-to-low transition on T0CKI pin
0 = Increment on low-to-high transition on T0CKI pin
bit 3 PSA:Prescaler Assignment bit
1 = Prescaler is assigned to the WDT
0 = Prescaler is assigned to the Timer0 module
bit2-0 PS2:PS0:Prescaler Rate Select bits
任何時(shí)候?qū)MR0寄存器進(jìn)行一次寫操作后,其計(jì)數(shù)功能將被禁止2個(gè)指令周期。
給大家一個(gè)意見:如果想用TMR0實(shí)現(xiàn)精確的定時(shí),一旦用了預(yù)分頻器后就不要對(duì)TMR0做任何寫操作。
注意:在中斷服務(wù)程序中查詢TMR0中斷時(shí),既要查詢T0IE位,還要查詢T0IF位。
uint16 count = 0;
void main(void)
{
PSA = 1;//prescaler is assigned to the WDT
T0CS = 0;//Internal instruction cycle clock
TMR0 = 58;//timer 200 cycle clock
GIE = 1;//global interrupt enable
T0IE = 1;//TMR0 interrupt enable
PORTD = 0x00;
TRISD = 0x00;
while(1)
{}
}
void interrupt ISR(void)
{
if(T0IE && T0IF)
{
T0IF = 0;
count++;
if(count ==15530) // 大于1s左右,led閃 爍一次。
{
count = 0;
PORTD = ~PORTD;
}
TMR0 = TMR0 + 58;
}
}
---------------------------------------------timer1--------------------------------------
Title:PIC16F877A TIMER1計(jì)數(shù)操作
Author:hnrain
Date:2010-12-28
使用前置分頻器
T1CKPS1 T1CKPS1
0 0 1 分頻 TMR1時(shí)鐘為晶振時(shí)鐘/(4*1)
0 1 2 分頻 TMR1時(shí)鐘為晶振時(shí)鐘/(4*2)
1 0 4 分頻 TMR1時(shí)鐘為晶振時(shí)鐘/(4*4)
1 1 8 分頻 TMR1時(shí)鐘為晶振時(shí)鐘/(4*8)
TMR1是16位寬度的TMR1由2個(gè)8位的可讀寫的寄存器TMR1H和TMR1L組成。
TMR1有專門的啟??刂莆籘MR1ON,通過軟件可以任意啟動(dòng)或暫停TMR1計(jì)數(shù)功能。
T1CON:TIMER1 CONTROL REGISTER
bit7-6 unimplemented :Read as ‘0’
bit5-4 T1CKPS1:T1CKPS0:Timer1 input Clock Prescale Select bits
11=1:8 prescale value
10=1:4 prescale value
01=1:2 prescale value
00=1:1 prescale value
bit3 T1OSCEN:Timer1 Oscillator Enable Control bit
1 = Oscillator is enable
0 = Oscillator is shut-off
bit2 T1SYNC:Timer1 External Clock Input Synchronization Control bit
when TMR1CS = 1
1= Do not synchronize external clock input
0= Synchronize external clock input
when TMR1CS = 0
This bit is ignored .Timer1 uses the internal clock when TMR1CS = 0.
bit1 TMR1CS:Timer1 Clock Source Select bit
1 = External clock from pin RC0/T1OSO/T1CKI
0 = Internal clock
bit0 TMR1ON:Timer1 on bit
1 = enables timer1
0 = stops timer1
說明:作用在TMR1的計(jì)數(shù)狀態(tài),計(jì)數(shù)信號(hào)從RC0/T1CKI輸入,
當(dāng)來一個(gè)上升沿時(shí),采集到一個(gè)有效的信號(hào),計(jì)數(shù)到TMR1L,TMR1H中。
當(dāng)計(jì)滿時(shí)就會(huì)產(chǎn)生中斷信號(hào)。
***********************/
#include
#include "../head/config.h"
__CONFIG(HS&WDTDIS&LVPDIS&PWRTEN);
void main(void)
{
T1CKPS0 = 0;
T1CKPS1 = 0;//不分頻
TMR1L = (65536 - 1)%256;//TMR1L,TMR1H賦初值
TMR1H = (65536 - 1)/256;
T1SYNC = 1;//TMR1異步計(jì)數(shù)器
TMR1CS = 1;
GIE = 1;//打開全局中斷
PEIE = 1;//打開外部中斷
TMR1IE = 1;//TMR1中斷打開
TMR1ON = 1;
PORTD = 0x00;
TRISD = 0x00;
while(1){}
}
void interrupt ISR(void)
{
TMR1L = (65536 - 1)%256;//重新賦值
TMR1H = (65536 - 1)/256;
if(TMR1IE && TMR1IF)
{
TMR1IF = 0;
PORTD = ~PORTD;
}
}
TMR2的寬度與TMR0一樣的也是8位,一般伴隨著CCP模塊和PWM功能一起出現(xiàn)。
8位寬度的TMR2定時(shí)器有一個(gè)前置預(yù)分頻器和后置預(yù)分頻器,同時(shí)還有一個(gè)周期控制寄存器與它配合一起實(shí)現(xiàn)針對(duì)單片機(jī)指令周期的計(jì)數(shù)。
TMR2只能作為定時(shí)器使用,無法對(duì)外部輸入的脈沖作計(jì)數(shù)。
TMR2定時(shí)器與TMR0相比,最大的區(qū)別是TMR2有一個(gè)周期的控制寄存器PR2。PR2寄存器可以設(shè)定定時(shí)器的上限值。只要當(dāng)TMR2的計(jì)數(shù)值和PR2的設(shè)定值相等時(shí)就會(huì)自動(dòng)歸0,同時(shí)產(chǎn)生一個(gè)中斷。
當(dāng)TMR2的計(jì)數(shù)值與PR2寄存器中所設(shè)定的數(shù)值相一致后,一睛個(gè)計(jì)數(shù)脈沖,的到來應(yīng)會(huì)讓TMR2溢出歸0,注意:一個(gè)計(jì)數(shù)溢出歸0后,并不一定產(chǎn)即產(chǎn)生TMR2IF中斷標(biāo)志,何時(shí)產(chǎn)生中斷標(biāo)志將取決于后分頻器的分頻比。如果選擇的后分頻比為1:8,則TMR2計(jì)數(shù)溢出8次后才產(chǎn)生1次中斷。
//前分頻器
//T2CKPS1 T2CKPS0
// 0 0 1 分頻 TMR1時(shí)鐘為晶振時(shí)鐘/(4*1)
// 0 1 4 分頻 TMR1時(shí)鐘為晶振時(shí)鐘/(4*4)
// 1 x 16 分頻 TMR1時(shí)鐘為晶振時(shí)鐘/(4*16)
//后分頻器
//TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0
// 0 0 0 0 1 分頻
// 0 0 0 1 2 分頻
// 0 0 1 0 3 分頻
// 0 0 1 1 4 分頻
// 0 1 0 0 5 分頻
// 0 1 0 1 6 分頻
// 0 1 1 0 7 分頻
// 0 1 1 1 8 分頻
// 1 0 0 0 9 分頻
// 1 0 0 1 10分頻
// 1 0 1 0 11分頻
// 1 0 1 1 12分頻
// 1 1 0 0 13分頻
// 1 1 0 1 14分頻
// 1 1 1 0 15分頻
// 1 1 1 1 16分頻